Hi All, So, it looks like it's OK for me to use an unterminated LVDS input on an I/O bank with Vcco = 3.3V. I even checked that the tools don't complain! Does anyone know of any data for Vicm (the common mode range) for these inputs? If the receivers are powered by Vccaux, I assume the spec is the same as for LVDS_25, otherwise maybe the spec scales with Vcco. TIA, Syms.
Symon,
The LVDS input buffer is a full CMOS differential comparator. You may go within ~ 0.6 volts of either ground, or Vccaux, and it will still meet speed spec.
You may go all the way to the rails (and even a bit beyond -- see abs max pin V specs), but then you take the diff stage out of its linear region, and it gets a bit slower.
Aust> Hi All,
Hi Austin, Thanks for your reply, that's cleared up my question! Cheers, Syms.
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