There is a reference circuit for the MGTVREF pin on page 132 of the Virtex-4 RocketIO MGT User Guide.
There is a resistor Refdes=R5 with a formula for calculating its value as follows:
R5=(2.5v-VREF)/100mA where 2.5V is the pullup voltage, and VREF is
1.235VI am assuming the 100mA is the current flowing through both the VREF Diode (NatSemi LM385-1.2) and into the MGTVREF pin on the V4. 100mA seems a lot though, especially considering the LM385 operated over the current range of 10uA to 20mA, so stating 100mA implies that the FPGA is sinking 80mA? Through a 1Kohm resistor??
This would also make R5=12.65 ohms.
Can someone from Xilinx clarify this?
Thanks
Jason