I'm trying to get a new board up and running, and the first order of business is trying to program a Virtex-2 and two XCF04 proms with a parallel cable. It's not working -- I can only identify the chain correctly occasionally, and can only program and correctly verify the PROMs once in a blue moon. I understand this might be a noise or signal integrity problem, but my board has 2 ground planes, the JTAG lines are short, and the power supplies are all clean. I lifted the FPGA configuration part of the design directly from an old board so it isn't a problem with the schematic, which only leaves layout. This time around I used .005" thick wires to route the JTAG lines where on the old board I used .008" thick traces, this can't be the problem can it???
Another weird problem is that my reset button isn't working either. I have the button wired to /PROG on the FPGA which should make the FPGA reload its code from the PROMs. It doesn't, it just sits there. It works fine on the old boards.
schrieb im Newsbeitrag news: snipped-for-privacy@webx.sUNCHnE...
business is trying to program a Virtex-2 and two XCF04 proms with a parallel cable. It's not working -- I can only identify the chain correctly occasionally, and can only program and correctly verify the PROMs once in a blue moon. I understand this might be a noise or signal integrity problem, but my board has 2 ground planes, the JTAG lines are short, and the power supplies are all clean. I lifted the FPGA configuration part of the design directly from an old board so it isn't a problem with the schematic, which only leaves layout. This time around I used .005" thick wires to route the JTAG lines where on the old board I used .008" thick traces, this can't be the problem can it???
the button wired to /PROG on the FPGA which should make the FPGA reload its code from the PROMs. It doesn't, it just sits there. It works fine on the old boards.
one the bluemoon eh :)
the board traces defenetly are not the problem! its not that critical no way.
can you download the FPGA from impact correctly? does it work?
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there is FPGA as frequency meter application that supports V2 and parallel cable, does it work on your board(s) ? if you make idcode looping in impact does it report errors?
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there is also VERY raw jtag test application, it loops 10,000 times 2 different jtag enquiries, and reports any errors does it run without complaing?
the layout isnt the problem for almost sure, unless you messed up some important connection.
the platform flash are more sensitive to JTAG behavior than other devices, that is the reason why xilinx had to make special 'tricks' into their XSVF player in order to correctly program the platform flash devices. maybe those problems are not any more there with current platform flash revisions, but there have been problems. and in generic the platform flash tends to be more picky on jtag issues.
the PROG button erratic behavior also indicates you have some problem, are you saying that you can program the FPGA, the done goes high, you press your prog button and FPGA is configured?
there is one not so well documented xilinx fpga jtag config behaviour, namly if an attempt to program the FPGA over JTAG fails, then the FPGA may be left in a state where initiatin serial mode configuration is not possible (eg the prog pin pulldown will not inititate new configuration)
is trying to program a Virtex-2 and two XCF04 proms with a parallel cable. It's not working -- I can only identify the chain correctly occasionally, and can only program and correctly verify the PROMs once in a blue moon. I understand this might be a noise or signal integrity problem, but my board has 2 ground planes, the JTAG lines are short, and the power supplies are all clean. I lifted the FPGA configuration part of the design directly from an old board so it isn't a problem with the schematic, which only leaves layout. This time around I used .005" thick wires to route the JTAG lines where on the old board I used .008" thick traces, this can't be the problem can it???
button wired to /PROG on the FPGA which should make the FPGA reload its code from the PROMs. It doesn't, it just sits there. It works fine on the old boards.
If you happen to be using an "old" cable like Parallel Cable3, or some others like Digilient cable, can have problems, like you describe, if the voltage on the JTAG header is too low. I would check the level of the voltage as a starting point and see if that has changed.
John Adair Enterpoint Ltd. - Home of Broaddown2. The Ultimate Spartan-3 Development Board.
It appears to be a BGA install problem. I have the one board loaded up with a test program that toggles all the I/Os so I can probe around on the board and test the BGA installation. One of the I/Os that is supposed to be toggling is just an open circuit. When I squeeze the board and the BGA between my fingers it becomes a closed circuit and I get my square wave out. When I let go it goes open again.
It just so happens that the /PROG pin is another one of these open circuits. If I squeeze the board and BGA and hit my reset button, the FPGA reboots itself. If I'm not squeezing the button does nothing.
I am going to assume that the other board that I can't even get to program has the same problem, just with more opens under the chip. On that one I can see the JTAG TDI signal going into the FPGA is toggling but the TDO out of the FPGA is always high.
I guess it could be a board manufacture problem, with the vias not working right and having intermittent connections in them. I doubt it though.
schrieb im Newsbeitrag news: snipped-for-privacy@webx.sUNCHnE...
with a test program that toggles all the I/Os so I can probe around on the board and test the BGA installation. One of the I/Os that is supposed to be toggling is just an open circuit. When I squeeze the board and the BGA between my fingers it becomes a closed circuit and I get my square wave out. When I let go it goes open again.
circuits. If I squeeze the board and BGA and hit my reset button, the FPGA reboots itself. If I'm not squeezing the button does nothing.
has the same problem, just with more opens under the chip. On that one I can see the JTAG TDI signal going into the FPGA is toggling but the TDO out of the FPGA is always high.
right and having intermittent connections in them. I doubt it though.
I dont hate BGA, or only when they are mis soldered ;)
the no connect on PROG pin would make the configuration to fail. It is a bit weird and I think also undocumented that if there is no pull up on PROG then the FPGA can not be configured over JTAG, at least on Virtex devices, I had one hand soldered protoboard (direct wires to BGA balls) where the JTAG was working ok, but config over JTAG not. The problems was I assumed the jtag conf work when prog is open. it does not.
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