vhdl to edif

Hmm is it possible to embedd VHDL constructs in EDIF really?

Then who will do the syntheses?

/michael

Reply to
Michael Laajanen
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and then consider using Icarus Verilog to generate the edif:

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Reply to
fpga_toys

Hmm,

Am I missing something but from VHDL to EDIF is done with syntheses, then Xilinx can merge EDIFs to one for place and route using ngdbuild.

Or what are you trying to do exactly, you have Xilinx webedition is that not good enough for what you are trying to do?

cheers

Michael

Reply to
Michael Laajanen

Xilinx's XST can be told to generate edif instead of ngc, though since ngdbuild can understand the ngc format, I am not sure what you expect to gain by doing it. You can combine ngc and edif files with ngdbuild, and it should combine them fine.

Anyway, XST takes an "-ofmt" parameter, which can be set to "NGC" or "EDIF". However, the gui does not provide a method for doing that, so you would need to execute XST from the command line.

Reply to
Duane Clark

ERROR:NgdBuild:766 - The EDIF netlist 'synthetic2.edf' was created by the Xilinx NGC2EDIF program and is not a valid input netlist. Note that this EDIF netlist is intended for communicating timing information to third-party synthesis tools. Specifically, no user modifications to the contents of this file will effect the final implementation of the design. ERROR:NgdBuild:276 - edif2ngd exited with errors (return code 1). ERROR:NgdBuild:28 - Top-level input design file "synthetic2.edf" cannot be found or created. Please make sure the source file exists and is of a recognized netlist format (e.g., ngo, ngc, edif, edn, or edf).

Any help is appreciated! YY

Reply to
Leow Yuan Yeow

I would suggest that you use the ISE GUI and its workflow.

/michael

Reply to
Michael Laajanen

Pardon me, but I don't understand your question, are you saying its impossible? I was trying to make a edif file from my vhdl file, and synthesize it with Xilinx together with another external edif file which uses my vhdl component. I have tried to get Synplify and LeonardoSpectrum evaluation version which reportedly can change vhdl to edif, but the trial license is taking so long to arrive and I'm running out of time.

YY

Reply to
Leow Yuan Yeow

Concerning your step two, you have to declare one of the two as a black box in the other. You can do this in EDIF by just having an interface declared with no contents section. The object containing the black box will be the top-level object. Send that top-level file to ngdbuild with the other file in the same folder. ngdbuild will automatically merge them. You'll see it in the log.

I usually use ngc2edif to make an ngc file a black box in my EDIF; I just take the output of the ngc2edif and chop it down to the (cell ... (interface ....) declaration, put two parenthesis on the end, and then paste that into my EDIF file.

Reply to
Brannon

As long as you are going to use ngc files, you might as well use the gui. The gui does not require that the files have the same type. I don't use schematics, but I have projects that include all kinds of combinations of VHDL, Verilog, edif, and ngc files.

I am assuming you have an edif file from another source, and you want to use it with some code you have in VHDL?

In your VHDL code, just put an entity declaration in for the edif file, and in the architecture body, connect it up. The name of the entity should match both the name of the edif file and the name of the top level entity within the file You can add declarations specifying that it is a "black box", but that is not necessary with recent versions of ISE. Put the edif file in some directory within your project.

Create your ISE project as usual. In the sources window, the edif file will show up as a "?". That is ok. Select your top level file, then select the "Translate" step in "Implement Design". Right click. In the box labeled "Macro Search Path", click browse, and find the directory with your edif file. Once that is set, run ISE as normal. When it gets to the translate step, ngdbuild will find the edif file and stick it in for you.

Reply to
Duane Clark

Thanks for all your patience! I have never used the command line before, and the gui seems to only allow a project to have files of the same type: vhdl source files, schematic, edif, or ngc/ngo. Is this what I should be doing?

  1. compile vhdl file into ngc file >> say myngc.ngc
2, "nbdbuild myedif.edf myngc.ngc" to combine the edif file and the ngc file into a single .ngd file
  1. use xst on the ngd file?

I have looked at the XST manual for command line...but it looks like greek to me. Am I supposed to learn how to do it my trial and error and figure it out myself here or is there any some better tutorial out there? Thanks!

YY

Reply to
Leow Yuan Yeow

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