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VHDL Obfuscators, the Good, the Bad, and the Ugly

I have been looking at the various options for VHDL obfuscators. I have tried all of the free programs that I could find and was left unimpressed. I also has similar unimpressive results with a demo version of a commercial program.

The best results were from some test code run through the VISENGI commercial program, but they do not have a demo version, so I can't make a full evaluation.

Before I make the final decision, does anyone have positive (or negative) experiences to relate about VHDL obfuscators in general and the VISENGI obfuscator in particular?

Thanks, Chris Johnson

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Best regards, Rick C. Hodgin

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Rick C. Hodgin

Hi Chris,

Personally I would bother with obfuscation as it is relative easy to de-obfuscate the code even if they change the signal names through each port map. If you really want to obfuscate your RTL then I would suggest getting hold of a synthesis tool that can write out an RTL netlist (like Leonardo Spectrum). You can then target a very simple device like a CPLD which doesn't have any complex modgens. You won't get better obfuscation than a netlist full of gates and FF's.

You could also look into VHDL2008 encryption which is OK for simulation but a different story if you want reach the bitstream,

Good luck, Hans

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