Interesting. I now handle this manually by using annoying identifiers for the unsynch nodes. Maybe "run_glitchy" vs "run".
OK here's mine. I get automated mistake-finding at the editor, analysis, and elaboration level of each library unit.
- Emacs vhdl-mode completes keywords and identifiers, matches most parens and prompts for clauses in a keyword statement. This prevents most syntax errors from happening.
- I run simulation analysis vcom -c mydesign.vhd from an editor function key every few lines of code. This step finds the most errors but puts the cursor right on each one and tells me what's wrong.
I would estimate:
90% syntax punctuation: missing or excess : ; ) etc. 10% static mismatch of code with local or library subtypes. Length, range etc. 10% signature mismatch of code and local or library subprogramsAt the top level, Emacs vhdl-make automatically finds units with multiple declarations in the project path, like this: WARNING: Architecture declared twice (used 1.): "synth" of "cnt_decode" 1. in "~/vhdl/play/cnt__decode.vhd" (line 18) 2. in "~/vhdl/play/cnt_decode.vhd" (line 18)
- elaboration: vsim -c mydesign will find most runtime mismatches and give a pretty good description of what's wrong. Some messages are more cryptic hints at infinite loops,like
That leaves the functional errors to simulation viewers and assertions, but I have no automated method for this.
-- Mike Treseler