vhdl code realization

Hi everyone,

I have a issue with fpga design optimization. Can any body explain me What is called "reorder path"? with any nice example with hardware realization.

As per some book reference it says tht: The data flow which minimize the critical path,..or more mean into: whenever multiple paths combine with critical paths, and combined path can be reorderd such tht the critical path can be moved closer to the destination register.

Hope to expect some good answers,..

sreeni, Moog,Inc

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jshrini.vasu
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It is nice that I tell synthesis what Fmax is, and synthesis does a fine job wiring up the LUTs and optimizing the paths for me.

-- Mike Treseler

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Mike Treseler

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