Dear all, I am implementing FLOATING point FIR filter with LATTICE structure. For this project i want 32bit Floating Point ADDER and MULTIPLIER in VHDL. Please tell me how and from where i can get the VHDL code for the same. THAKING YOU ALL.
Shivkaran Ravidas
What is the gain in floating point in a FIR ?
Rene
-- Ing.Buero R.Tschaggelar - http://www.ibrtses.com & commercial newsgroups - http://www.talkto.net
Not to sound rude or anything, but you have a gmail address; try a google search.
I found two synthesizable packages on the 1st page of hits.
Why?
Consider that the floating point add nas to denormalize one of the addends in order to be able to sum the two values. In other words, all the addends in the sum have to have the same weighting, which is indicated in floating point by the exponent. You gain very little by attempting to do the filter with floating point arithmetic, and what you do gain comes at a very high cost.
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