I have written a process to generate random numbers using UNIFORM. I was trying to check the results using "rand" in matlab. How do i initialise the seed values of both these functions to the same value. I see that the random numbers generated by UNIFORM are different compared to rand when the seed values are left uninitialised. What do I need to change so that I get same output from both programs.
Thanks
Uninitilised positives (the seeds in this case) will take a value of 1 when they are put into the uniform function. Unitialised types when used will take type'low as their value
positive'low = 1 std_logic'low = 'u' etc.
so both of your first calls to uniform are seeding it with two 1s.
I dont know how the seeding works in matlab. It may not even use positives, but the entire integer range. it is common in C to seed the random number generator with the system time. Does matlab do something similar? The C random function only has 1 seed, whereas uniform takes
2.
I am not sure how the rand function in MATLAB works. I tried to search if the code of the function was described anywhere but couldnt find. I dont know if we can get MATLAB to generate results as UNIFORM does. As you said, uniform has 2 seeds while rand has 1. If anyone has an idea on how this can be done, please post your comment.
Why not generate a file containing all the stimulus for the vhdl and matlab model in one or the other, instead of trying to recreate the random sequence?
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The goal is to check that the VHDL code generates results similar to MATLAB . I have written the outputs of both in seperate text files. I am not able to initialise the rand function to generate results similar to MATLAB and vice versa. Called MATLAB today to get some more information on how they have developed the rand function. They said that this information is not available to the public. I think one of the ways to do this would be, generating a pdf function for both cases and showing that their random distriution is similar.
If any of you have other ideas please post them.
In that case, why are you even trying to do this? generate a file from matlab that is used as the stimulus for the VHDL testbench. Then you do not need to use the uniform function at all, and then you are testing that the results match.
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.I have to use the UNFORM function to check if it behaves in sync with MATLAB. I have given up on getting the same results in matlab as in VHDL. I am just trying to get a pdf plot of both results. No idea on how to do this yet.
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Sounds like you have an ill-posed question here.
Mathworks won't tell you how it got it's pseudo-random stream...call it rand(i), where rand(0) is the seed.(In fact, you don't even know if there is a single seed or any seed for that matter!)
You have created a pseudo-random stream fpga_rand(i), where the seed is fpga_rand(0). You are going to have to be satisfied with using statistical tests to verify that your function fpga_rand passes as many of the tests as you need, or at least as many as the matlab rand function passes. Look up
alan
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