Variable Bus Input/Output Fifo

Has anyone ever written a variable width fifo? I would like to have a fifo that accepts a 32-bit input and reads out a 16 bit output.

Reply to
Dominic
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Yes

The blockrams in Xilinx architectures lend themselves nicely to doing this. In your case you need to count in words the amount you have stored. Index addressing used to access the ram for input and output should differ in size by one bit more on the 16bit side than the 32bit side.

John Adair Enterpoint Ltd. - Home of Broaddown4. The Ultimate Virtex-4 Development Board.

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Reply to
John Adair

Do it all the time. This is particularly easy with Xilinx block rams as they can have different widths on each port.

As always, you have to keep your wits about you when designing the pointers & flag logic.

Regards, Allan

Reply to
Allan Herriman

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