using internal POR

Hi all. I'm new to all this FPGA stuff. Recently bought the Xilinx Spartan-3 starter kit (now I regret not waiting 2 months for the newer kit that includes way more for just an extra $50). Anyways, I'm new to designs in VHDL. I have a background on microcontrollers (Microchip) but this is so different I feel lost sometimes.

My question is, I implemented a PS/2 mouse interface from opencores.org. This needs a reset signal sometime. If I set this signal to either 0 or 1, the circuit does not work. What I did was keep the circuit in reset until the clock counter reaches a certain value, and then release the reset from this module. This works but it seems kind of nasty. Is there a nicer way to do this?

Regards, Hernan

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drg
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"drg" schrieb im Newsbeitrag news: snipped-for-privacy@z14g2000cwz.googlegroups.com...

no, there is not much else, if you need a reset then you need some sort of circuitry that generates the reset pulse if you are using DCM you may also need to start your reset counter after the DCM lock goes high assuring that the system is released from reset when the internal clocks are stable

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Antti Lukats
http://www.xilant.com
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Antti Lukats

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