Using FPGA to feed 80386

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Would it be possible to connect an FPGA up to
an 80386 (or other) CPU, to respond to memory
and port requests, and leverage it as a resource?

I'm thinking software runs on the 80386, given
it by the FPGA, instructing it as a type of co-
processor, which does things on command.

I see voltage differences as an issue.

Best regards,
Rick C. Hodgin

Re: Using FPGA to feed 80386
On Thursday, 11 December 2014 20:55:20 UTC+1, Rick C. Hodgin  wrote:
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http://igg.me/at/zynq
:) get one

I did build many of my work stations myself, 8088 based, 80386 was advanced stuff.  

All is doable, question is what makes sense and what is fun.

Hacking bare metal Zynq is FUN!


Re: Using FPGA to feed 80386
How would I handle the disparate voltages? Are
there rail devices which support N pins in at V1,
which then support V2 out the other side? So I
would wire 80386 to rail-1, and rail-2 to FPGA?

Best regards,
Rick C. Hodgin

Re: Using FPGA to feed 80386
On 12/11/2014 1:24 PM, Rick C. Hodgin wrote:
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What does this mean ??


Re: Using FPGA to feed 80386
hamilton wrote:
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The 80386 uses 5V. I was thinking the Altera
Cyclone V GX Starter Kit only supported up to
3.3V. But I see now it supports 5V on GPIO pins.

Best regards,
Rick C. Hodgin

Re: Using FPGA to feed 80386
On Thu, 11 Dec 2014 14:03:14 -0800, Rick C. Hodgin wrote:

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"Support" as in it will let you power a GPIO block from 5V?  Or does it  
just mean that a 3.3V GPIO pin is 5V tolerant?

If the latter, then you need to make sure that the '386 has TTL-level  
inputs (V_HI < 3V or so).

--  

Tim Wescott
Wescott Design Services
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Re: Using FPGA to feed 80386
Tim Wescott wrote:
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It says you can assign 5V to each pin, which I
assume means true I/O. I would use externally
regulated 5V power supply, as from an old case,
for all CPU Vcc inputs. The GPIO would only
power data and a handful of switches.

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Definitely a 5V part circa 1986. Ceramic 16 MHz
package.

Best regards,
Rick C. Hodgin

Re: Using FPGA to feed 80386
On 12/11/2014 5:21 PM, Rick C. Hodgin wrote:
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I suggest you dig harder on this issue.  It has been a long time since  
FPGAs were 5 volt tolerant.  The only way I know to make the FPGA 5 volt  
tolerant is to either use a current limiting resistor on the input pin  
(a very poor solution because the pin capacitance and the series  
resistance create a low pass filter that prevents any fast changes) or  
level shifters which come in many forms.

I use Quick Switch shifters on my current design.  They are really just  
analog switches with Vcc driven by 5 volts with an internal diode drop.  
  This puts the gate drive at a voltage so that nothing over about 3.3  
volts will pass though the switch.  So it clamps the 5 volt side to 3.3  
volts when connecting to your FPGA I/Os.  Since 5 volt TTL type logic  
levels are compatible with 3.3 volt TTL logic levels all is good.  The  
delay through the switches is a lot less than the prop delays through a  
logic gate so they are faster too.

Check to see if they are using some type of voltage conversion devices  
between the FGPA and the I/O pins.  It would be very unusual if they do.  
  Otherwise the FPGA I/Os are designed for multiple voltage standards up  
to 3.3 volts.

--  

Rick

Re: Using FPGA to feed 80386
On Thu, 11 Dec 2014 14:21:20 -0800, Rick C. Hodgin wrote:

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You're not answering my question.  "Supports 5V" can mean one of two  
things, both of which meanings I've stated.  "Assign 5V to each pin"  
essentially carries the same two meanings.

Can you power the FPGA GPIO from 5V, so that you get 5V out?  Or can it  
just stand to get 5V on an input without the FPGA operating incorrectly?

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Great.  Wonderful.  5V logic comes in a lot of different flavors.  For the  
purposes of our discussion, you can break it into the set of all parts  
that need a full 5V on a logic input to correctly interpret the answer as  
a '1', and parts that can get by with 3.3V.  So which is it?

--  

Tim Wescott
Wescott Design Services
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Re: Using FPGA to feed 80386
On 12/12/2014 2:20 AM, Tim Wescott wrote:
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Not directly from the FPGA.  He said he is using the "Cyclone V GX  
Starter Kit".  This board puts a 47 ohm resistor in series with the I/Os  
to the header along with Schotkey diodes to 3.3 volts and ground.  If  
this is driven from 5 volt logic it may pop the diodes and the 47 ohm  
resistor won't protect the FPGA inputs.   This board is *not* 5 volt  
tolerant.


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If he is going to use the 386 he has to build a board anyway.  So that  
board can contain 5 volt to 3.3 volt converters to make it all work  
properly.

Interesting that the starter kit has Arduino compatible headers on it.  
I wonder if anyone has built an Arduino compatible CPU board with a 386,  
lol

--  

Rick

Re: Using FPGA to feed 80386
On Fri, 12 Dec 2014 03:13:50 -0500, rickman wrote:

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I think the OP needs to learn a bit more about the wonderful world of  
logic levels (and Rick H. -- feel free to ask).

My inclination is that if the guy needs to make a board anyway, he may as  
well put the FPGA on it, and not mess around trying to make a board to  
stick onto the starter kit.  I don't know enough about the parts involved  
to know if, at that point, he can get away with putting them together  
without level translators or not.  I suspect not -- I'll bet that 386 has  
5V CMOS-level inputs, and that the Altera part can't be run with 5V on the  
I/O.  But I am NOT going to take the time to dig through data sheets --  
the OP can do that as part of his education in digital hardware design.

--  

Tim Wescott
Wescott Design Services
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Re: Using FPGA to feed 80386
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My feeling would be to try and avoid using 5V parts.  For instance, the
Intel Quark 1000 is a 400MHz Pentium-class CPU being aimed at
microcontroller applications.  It probably isn't quite as easy to manage
(it's a BGA package not a PLCC) but is rather more modern.

The Quark itself is a bit of a camel, but it's the modern equivalent of a
386.  The alternative would be an Atom, VIA or some other 'embedded' x86
processor.  All of these might be harder to handle than the slower 386
though.  The Quark comes on the Intel Galileo board which can be connected
to the Cyclone V GX via PCIe, which is one way to join them.

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I'd suggest the OP avoid making an FPGA board: a 6/8 layer board with a ton
of low-voltage high-current FPGA power supplies, BGA escapes, signal
integrity etc, is a somewhat more complex endeavour than a basic-ish 2/4
layer board to hook into an expansion header on the existing board.  Not
least because you can design that in a free/cheap tool, you don't have to
pay for fancy PCB tools, and you can get it fabbed anywhere.

I very much doubt it'll be possible without level translators, which doubles
the complexity of the addon board.

Theo

Re: Using FPGA to feed 80386
On Fri, 12 Dec 2014 19:33:27 +0000, Theo Markettos wrote:

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If he can't find an FPGA in something other than BGA packaging then yes --  
you're right.  And, he probably would need an FPGA with enough I/O to be  
in a BGA.  So again...

--  

Tim Wescott
Wescott Design Services
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Re: Using FPGA to feed 80386
On Friday, December 12, 2014 2:13:15 PM UTC-5, Tim Wescott wrote:
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I have no plans to make a board at the present time.  Just some
interfacing cabling between the Altera Cyclone V GX starter kit
I purchased and the ethernet board I bought.  The rest I plan to
do in the native kit.

Eventually (whenever I get the CPU designed and working), I would
like to see about getting an actual device manufactured with its
own real hardware.  And ultimately, I would like to even create my
own CPUs from raw silicon (epitaxial processes up through packaging).
Big dream though. :-)

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The whole FPGA to feed an 80386 was me thinking about whether or not such
a thing were possible.  I do not plan to do it.  Once I began thinking
about it I saw that the 80386 used 5V, and that I had only remembered the
Altera documentation saying 1.1V?? to 3.3V.  I did not remember where it
said 5V anywhere.

Best regards,
Rick C. Hodgin

Re: Using FPGA to feed 80386
On Friday, December 12, 2014 2:20:35 AM UTC-5, Tim Wescott wrote:
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The Starter Kit says 5V, 1 amp max.  I assume that means drive current,
if that's the correct phrase. :-)

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I don't know. :-)  So far as my thinking goes:  I assign a meaning to
some of the GPIO pins, and whatever magic needs to happen under the
hood to get that particular pin to work at 3.3V or 5V happens without
me having to worry about it at this level.

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I don't know.  I looked at the data sheet on the 1986 80386DX, and it
showed a number of pins being used which indicated 5V.  I assumed the
entire chip was 5V because I later remember receiving a Pentium-233
chip that was labeled 3.3V explicitly on the case, which made me think
that this later chip was something new at that voltage.

But, I could be wrong on all counts.

Best regards,
Rick C. Hodgin

Re: Using FPGA to feed 80386
Rick C. Hodgin wrote:
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That's pretty clearly the input power to the board.  You can be very
sure that there are a number of DC-DC point-of-load converters to
make lower voltages from this, and the 5V itself is unlikely to power
any other board-level component directly.


--  
Gabor

Re: Using FPGA to feed 80386
On Friday, December 12, 2014 2:50:16 PM UTC-5, Gabor wrote:
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If you go here:
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo16%7&No83%0&PartNo=4

And download the C5G User Manual, and look on page 52, you'll find
this quote:

-----[ Start ]-----
The The 40-pin header connects header connects header connects directly to
36 pins of the Cyclone V GX FPGA, and also provides DC +5V (VCC5), DC 3.3V VCC3
and two GND pins. Figure 3-25 shows the I/O distribution of the GPIO connector.
The maximum power consumption of the daughter card that connects to GPIO port
is shown in Table 3-18:

Table 3-18:
Power Supply of the Expansion Header
Supplied Voltage   Max Current Limit
5V                 1A
3.3V               1.5A 1.5A
-----[ End ]-----

Best regards,
Rick C. Hodgin

Re: Using FPGA to feed 80386
Rick C. Hodgin wrote:
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Fine, then its a power supply output.  It makes no implication that
the I/O pins can drive to 5V, only that 5V is supplied to power
your add-on module.  While you could use that to power a 5V component
like your antique CPU, it was probably intended as a source for
circuitry or additional supplies that don't directly connect to
the I/O pins.  For example you might want to add a USB interface
which requires 5V for its connector, even though any modern PHY
chip will run at 3.3V for all logic I/O.

By the way, the I/O pins won't drive at 1A either.

--  
Gabor

Re: Using FPGA to feed 80386
Gabor, to be clear, I posted that information
from the point of view: "This is where I got my
info. In case I'm wrong, someone could correct
me." I wasn't trying to correct you. I'm still not
100% sure what it means.

Best regards,
Rick C. Hodgin

Re: Using FPGA to feed 80386
On 12/12/2014 6:13 PM, Rick C. Hodgin wrote:
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The 5 volt pin is a power source from the FPGA board to the cable.  It  
can supply 1 amp of current.  "and also provides DC +5V (VCC5)" says  
this is separate from the FPGA I/Os.

To learn about the I/O voltages the FPGA supports you need to read the  
pin definitions of the I/Os from the FPGA in the eval board manual.  
This will be determined by the voltage supplied to the FPGA from the  
eval board as well as the configuration used in the FPGA.  Even with a  
given voltage, there can be multiple I/O standards.

--  

Rick

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