Xilinx gurus,
I want to use a ChipScope ILA or 2 in an EDK design. I know I have 2 options for ChipScope: Use the ISE and add a new source and make a ChipScope source/file, or use the ChipScope Core Inserter (used with an ise command line flow), and give the inserter paths to the appropriate ng* files. Then remap place route etc.
However I would really like to use ChipScope with the EDK flow. Certainly the only option here is probably to build my design completely, so that all the netlists are created, then run the ChipScope core inserter, insert the ILA cores into the netlists, and then go back to EDK, and rerun the hw build (and hope it doesn't re synthesize) OR run the rest of the back end with command line scripts. Since the EDK generates some internal logic to include the PPC in the JTAG chain though, I wonder if this is going to mess up the ChipScope JTAG stuff?
Also, I was thinking that making my design in EDK completely, and then when its ready, changing it into an ISE flow, and everything that entails, and then just inserting the ChipScope core like would be done with any ISE flow. I would rather avoid doing this if possible but maybe I will have to.
What say you Xilinx gurus out there?
-Joel