Hi, has anybody used before Celoxica's FPGA board RC10 with Xilinx's EDK kit? Somehow, the bit stream I create, yields 'configuration error' whenever I used the FTU3 utility provided by Celoxica to download the bit file generated separately by EDK. I even tried exporting the EDK flow, such that ISE will be separately used to synthesize the design and generate the bit file. In this case, the bit stream no longer yields 'configuraton error'. However, the bit file does not work at all when I used the FTU3 utility to download the bitstream. I tried using only ISE standalone to synthesize a design and generate the bit file, and only this works with the FTU3 utility
Anybody has any advice for me? I am currently using Celoxica's RC10 board for implementation of some microblaze based design.
thanks!
Chris