USB transceiver for FPGA

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Hi,

 I am looking for an USB transceiver chip that can be interfaced to an
FPGA WITHOUT microcontroller. USB 2.0 would be ideal, 1.1 is also ok.
Any suggestions?

Thanks,
---
jakab



Re: USB transceiver for FPGA
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The FTDI 245BM sounds like what you want (although it's only 1.1).

See..

http://www.ftdichip.com /

..for details.

I've a board based on this I built for my own use (see under
downloads on my web site). I've a couple sitting here that
someone said they wanted but money hasn't been forthcoming.

Yours for 30 each if you want one/both for prototyping.

See my downloads page for details of an example project showing
how to drive it, it's relatively easy.


Nial Stewart

------------------------------------------------
Nial Stewart Developments Ltd
FPGA and High Speed Digital Design
www.nialstewartdevelopments.co.uk




Re: USB transceiver for FPGA
Thanks for the suggestion, it looks like they also have USB 2.0 chip,
the board you have looks interesting too. I will search a bit more before
deciding.
---
jakab
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Re: USB transceiver for FPGA

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Their chip will not run USB2.0 high speed, only full speed. ( I have
been able to get 1 MB/sec max on a real board )  Otherwise it is
great, I have used it on several boards.  They are going to have a
high speed chip but it is at least a year off as it is just in
planning ,  this is a major bummer for my projects.

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Re: USB transceiver for FPGA
I'm working on a project with USB to a XILINX FPGA.
The interface chip I'm going with is Phillips ISP-1501
http://www.semiconductors.philips.com/cgi-bin/pldb/pip/isp1501

Good Luck,
Colin

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Re: USB transceiver for FPGA
I have looked at that one some time ago but there was a message on
the Philips website that the chip is going obsolete and that scared me
away...
I tried to confirm with the Philips rep. here in Ottawa,Canada but
all I got to talk to was an answering machine!. Did you manage to get an
eval board for it?
---
jakab
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Re: USB transceiver for FPGA
Have you looked at the USB 1.1 and 2.0 IP Cores at www.opencores.com?

I looked very closely at the 1.1 version and found it took only 6 pins and
$1.75 transceiver chip.

Ken

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Re: USB transceiver for FPGA
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there is a japanese design (VHDL, and Visual basic host example)
that uses no tranceiver at all, ie USB DM,DP directly to FPGa

antti

Re: USB transceiver for FPGA
Is it free?  :)

That is very interesting and that is what I went looking for.  I imagined
the logic in the FPGA would wiggle D+ and D- appropriately.  I understand
that the 480Mbps of 2.0 might be tough in a garden variety FPGA, but 1.1
might be doable.

I wonder if the special LVDS pins of a Cyclone or Stratix would do 2.0?  Of
course going to Stratix would negate any BOM savings.

Ken

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and



Re: USB transceiver for FPGA
480 MHz LVDS  IO is not out of question on Xilinx FPGAs (Altera ? don't
know)
in terms of frequency; what I question is the voltage/current levels
to/from the USB,
have to dig into the USB spec to figure this one out.
Any pointers to this japanese design or its documentation?
---
jakab
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Re: USB transceiver for FPGA
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its free but I cant give yout the url, tried to find it again for you
but failed, searching on japanese sites is a bit difficult :)

it is from some-one who wrote it for XSP-009 board, but there are no
links to it from XSP-009 official site(s) as much as I see.

I have the files, can send you per email if you wish, let me know
antti

Re: USB transceiver for FPGA
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google usb.lzh
=>
http://member.nifty.ne.jp/fpga/freeip/usb /

:) found!
antti

Re: USB transceiver for FPGA
I did a quick & dirty project based on the OpenCores USB 1.1
design and drove the D+ and D- pins straight from the FPGA.
I wasn't concerned about strict compliance to the USB spec...

I got the project to work fine, but I only tried it on a couple
of computers.  Different USB hosts might complain about the
direct D+ D- interface.

I did have to do some mods to the OpenCore USB design. As I looked
though it I found some things I was not real happy with.  There was
no problem meeting timing with the Xilinx Spartan-2 chip I used.

John Providenza


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Re: USB transceiver for FPGA
: I did a quick & dirty project based on the OpenCores USB 1.1
: design and drove the D+ and D- pins straight from the FPGA.
: I wasn't concerned about strict compliance to the USB spec...

: I got the project to work fine, but I only tried it on a couple
: of computers.  Different USB hosts might complain about the
: direct D+ D- interface.

: I did have to do some mods to the OpenCore USB design. As I looked
: though it I found some things I was not real happy with.  There was
: no problem meeting timing with the Xilinx Spartan-2 chip I used.

Do you plan to conmtribute the mods back? It would be appreciated...

Bye
--
Uwe Bonnes                 snipped-for-privacy@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
We've slightly trimmed the long signature. Click to see the full one.
Re: USB transceiver for FPGA
: I did a quick & dirty project based on the OpenCores USB 1.1
: design and drove the D+ and D- pins straight from the FPGA.
: I wasn't concerned about strict compliance to the USB spec...

: I got the project to work fine, but I only tried it on a couple
: of computers.  Different USB hosts might complain about the
: direct D+ D- interface.

: I did have to do some mods to the OpenCore USB design. As I looked
: though it I found some things I was not real happy with.  There was
: no problem meeting timing with the Xilinx Spartan-2 chip I used.

Do you plan to contribute the mods back? It would be appreciated...

Bye
--
Uwe Bonnes                 snipped-for-privacy@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
We've slightly trimmed the long signature. Click to see the full one.
Re: USB transceiver for FPGA
John,

That's pretty cool.  I might try it some day after I get some more
experience under my belt.

My problem was that I needed an fpga IP solution at an OTS price and
reliability, but all I found were extremes.  Either the core was "free" and
not guaranteed fully compiant or the price was sky high.  So I wound up
sticking with my old reliable NetChip @ $8.

Ken

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imagined
understand
Of
www.opencores.com?
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pins



Re: USB transceiver for FPGA
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I've thought about that, two pins programmed for 3V3-cmos should be good
for tx and rx of SE0 but I never got around to checking if one of the
differential standards on the FPGA would be within spec for USB?

-Lasse


Re: USB transceiver for FPGA
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It has been awhile since I looked at the USB spec, but I seem to recall
that there is a non-standard state that is used to signal the rate or
some other aspect of the interface.  I want to say this state is both
signals high or both low at the same time.  Am I out to lunch on this?  

If there is a non-standard state on these pins, you would not be able to
use an LVDS driver.  You would need two independant outputs.  

--

Rick "rickman" Collins

snipped-for-privacy@XYarius.com
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Re: USB transceiver for FPGA
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single ended zero (SE0) is both both pins low and afair you have to both
detect and generate that, my idea was to use two standard cmos IO's
for that and wire a diffential set in parallel.

-Lasse


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