Transistor count

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Hi!

Could someone tell me how many transistors are integrated on the XC3S5000
Spartan-3 device?
Thank You.
Arnaldo.

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Re: Transistor count
More than you can count on both hands and feet, even if you count in binary
:-)

Arnaldo Oliveira wrote:

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--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
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Re: Transistor count
I think the answer is " more than 100 million, but less than 300 million".

We are caught between embarrassment: "that's how many we need"  and
pride: "that's how good we are, to be able to make and sell that many
for a reasonable price".

An then there still are some people who really and seriously (!) think
they can calculate device reliability and MTBF from the total number of
transistors. These guys do not seem to die out, even though we have told
them, and proven to them, again and again, that such calculations are
utter nonsense.

So Ray is right, you would need another seven or eight fingers...
Peter Alfke
========================
Ray Andraka wrote:
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Re: Transistor count
I think that's because one of the standards counts transistors in its MTBF..
so a PAL is more reliable than an FPGA but less reliable than an HC00.

Simon

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binary
XC3S5000



Re: Transistor count
Simon,

That is for the lazy folks:  if you know the reliability (from studies,
manufacturers data, etc.) you can choose to replace the "count method" with the
real data (wow, what a concept!).

The "count method" is there as a last resort, if there is no other way to gauge
reliability.  Once you see the count method numbers, it should send you
screaming to get the real data.  The standards bodies know this, and understand
this, it is just that lazy engineers just keep filling out the forms as if they
were still designing in 1968 ....

Our reliability group is happy to provide the latest and most up to date
reliability information for completing these studies properly (per the
standard).  Please make the request thru the hotline.

Austin

Simon Peacock wrote:

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Re: Transistor count

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with the
gauge
understand
they

There is a story I heard some years ago, related to statistical physics, but
it should work for any statistics problem.  A person was told that the
probability of a bomb being on an airplane was 1 in 1000, but the
probability of two bombs was 1 in 1000000.  To be safe, he always brought
his own bomb on the plane.   (I think those are the numbers in the story,
which has no relation to any real planes or real bombs.)

The important thing in a large number of problems is statistical
independence.   When all the transistors on a single chip are made at the
same time, using the same process, the probability of one failing is not
statistically independent of another failing.   A bad batch of any of the
chemicals that go into the processing, various mechanical problems that
could occur, or any number of other events tend to affect all the
transistors on a chip equally.  Without statistical independence any count
based method will fail, just like in the bomb story.

-- glen



Re: Transistor count
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That would be true for some failure modes due to incorrect
construction.  But there is a very low failure rate due to "wear" of the
semiconductor.  This would include electro-migration, void migration and
a host of other effects I don't remember.  If you have a failure rate
per transistor for a given process, then counting transistors can be
applied to these failure modes.  The question is whether these modes are
significantly more or less likely to make the chip fail than other
external failure modes like the PSU overvolting or someone dropping a
hammer on the chip.  

--

Rick "rickman" Collins

snipped-for-privacy@XYarius.com
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Re: Transistor count
You missed the point.. I'm the engineer who has to deal with his Boss
quoting specs which I know are out moded
was just mentioning the problem as I have come across this before.. You and
I both know that a single FPGA is far more reliable than 500 transistors..
Just sometimes the piece of paper is the piece of paper.. and unless you
find a standards organisation willing to certify a new, better method, you
get left with more paper ...then, of course, you have to convince my boss
:-)  but at the moment we usually don't both with reliability reports..
there are just usual design practices used to keep the reliability as high
as possible... like don't use a 5V cap on a 5V rail :-)
Am not designing for space or aircraft so I have that luxury.

Simon


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with the
gauge
understand
they
MTBF..
million".
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of
told



Re: Transistor count
Even if it's a standard, it still is stupid.
Stupidity has a tendency to be very long-lived.
But let's hope that sanity will prevail, some day...
Peter Alfke

Simon Peacock wrote:
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Re: Transistor count
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Many years ago, somebody told me that system reliability was
roughly:
  connectors
  solder joints
  bond wires
  on chip problems

I think the handwave was a factor of 10 each step.  (Big handwave.)

Is that still a good rough cut?  Any obvious overview article I
should scan for a modern view?

Is on-chip failure rate anything anybody should worry about these days?
What fraction of real-world failures are caused by ESD or running too
hot?  (or ...?)

--
The suespammers.org mail server is located in California.  So are all my
other mailboxes.  Please do not send unsolicited bulk e-mail or unsolicited
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Re: Transistor count
Hal,

That is still true.

If you look at the calculation of reliability methods used by the telecom
business, the NEBS (new equipment building standards) from Telcordia (aka
Bellcore), you will find all of these items with their listed FIT rate (failures
per billion hours).

Things like fuses (100 fits), and diodes (7 fits), or connectors (10 fits per
mating pin-pair), are listed from their historical data, which can be tossed out
and replaced with your own data, or data from the manufacturer.

Austin

Hal Murray wrote:

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Re: Transistor count
On Friday, September 12, 2003 8:41:30 PM UTC+7, Arnaldo Oliveira wrote:
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XC3S5000  
System Gate: 5M  
Equivalent Logic Cells: 74,880

I'm doing a research about method to estimate that number by using only datasheet.

Re: Transistor count
snipped-for-privacy@gmail.com wrote:
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Hmm. Some dumb guesses, as they don't give so many details now.

Maybe configuration bits are stored in 6 transistor SRAM cells.

Dual-port BRAM probably takes somewhat more per bit.

LUT4s should be made up of cascaded 2 input MUX to avoid glitches,
if you have true and inverted select lines (8 transistors) the 7
MUX should be 8 transistors each, so 8*7+8 or 64.

LUT bits need to be writable to use them as RAM, so a few more
transitors for each bit to allow that.  

OK, try an easier way, instead.

The XC3S5000 is supposed to be equal to 5M system gates.
The usual gate is 4 transistors, so 20M.  

A rough guess is that the FPGA is a factor of two less efficient
in gate usage than ASIC, so that would be 40M.

Block RAM is 1872*1024 bits of, maybe 10 transistors each.
LUT RAM is 520*1024 bits, of, maybe 20 transistors each.
That is, 320 for an LUT4, which doesn't sound far off.

We need 104 block 18x18 multipliers, which might take about as
many transistors as the BRAM. That would be 184320 transistors
each, which is about right for an 18x18 multiplier.

This looks like it might be closer to 60M.

-- glen





Re: Transistor count
snipped-for-privacy@gmail.com wrote:
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1) You do realize you just dug up an 11-year-old thread?
    On Friday, September 12, 2003 ...

2) It would be a lot easier to estimate by the die area and process
    node.  Besides the config SRAM cells, don't forget that since
    Virtex (original) and Spartan 2 all Xilinx FPGA's have buffered
    routing.  So everywhere you see connections between lines in the
    FPGA editor there are active drivers.

3) Other than some academic exercise, why would you care how many
    transistors are used?  Are interested in the silicon efficiency
    of FPGAs vs. ASICs?

--  
Gabor

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