I owe some folk an apology.
When I wrote that, my intent was only to poke mild fun at the fact that Xilinx appnotes are such a pervasive part of the FPGA design culture that they almost *define* what's conventional. But I didn't write it very well, and it was misunderstood as a slur on the quality of Xilinx material. That would have been quite absurd and I unreservedly apologise for any offence.
Xilinx apps people have done us all a great service over the years by sharing a huge variety of tips and techniques (some conventional, some highly creative). I've had many occasions to be grateful for that.
-- Jonathan Bromley, Consultant
DOULOS - Developing Design Know-how VHDL * Verilog * SystemC * Perl * Tcl/Tk * Verification * Project Services
Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, Hampshire, BH24 1AW, UK Tel: +44 (0)1425 471223 mail: snipped-for-privacy@doulos.com Fax: +44 (0)1425 471573 Web:
The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated.