The simulation of Xilinx DDC(Digital Down Convert) IP Core can't gain the result

Hi,everyone i want to use the Xilinx DDC core version1.0, so i must simulate it by modelsim,but i found the result of RDY,DOUT_I,DOUT_Q is zero, RFD is '1', i have tried many many times to change my parameters, but it's no effect. i wish your help ! Thank you very much!

ARRON

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ARRON
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