When studying SystemVerilog, some book said 'virtual' is used to get the reference of the interface. But why the language not use 'ref' to get interface reference? And what's 'virtual interface' actually mean? Thanks!
For example, class eth_mii_mac; local virtual eth_mii_if sigs; task new (virtual eth_mii_if sigs); this.sigs = sigs; endtask: new ... ... endclass: eth_mii_mac
Don't get me started... "virtual interface" is a really stupid name; as you correctly say, "ref interface" would have been far more sensible. However, it's too late now and we're stuck with it.
A "virtual interface" (or, simply, a "virtual") is just a variable that contains a reference to an existing interface instance. That reference can be moved around dynamically so that it can point to different interface instances at different times during the simulation. In practice, classes that need to talk to interfaces will usually do so via a variable of "virtual interface" type. This makes it possible for class objects (and, in particular, a test environment) to choose *at run time* how they connect to the device under test. Without virtual interfaces, all the connectivity is determined statically at elaboration time, and therefore can't be randomized or reconfigured.
The VMM book has clear descriptions of how to use "virtual" to access components of an interface with the help of a clocking block in the interface, passed through a modport of that interface. It sounds complicated, but in practice it's easy to use and works well. It gives you clean isolation between a class-based testbench, running in a program block, and a device-under-test and its test harness, written in modules.
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I agree that it is a strange choice. However, 'ref' generally means a pass-by-reference argument. So what would you use for a virtual interface variable passed by reference, 'ref ref interface'?
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