SystemC in modeling HW/SW

Do you have a question? Post it now! No Registration Necessary

Translate This Thread From English to

Threaded View

I was told by a friend that SystemC is currently the best to modeling
hw/sw design. I've read on the internet where people were saying that
SystemC is a more "complete model" which I don't quite understand.
I've look at several other tools for example Impulse C that gave a
very good description on how hw/sw  modeling can be done easily using
Impulse C.

Could anyone be kind to share why do you think systemC is the best
tool to model hw/sw and how? I'm open to any good source should you
wish to share.


Re: SystemC in modeling HW/SW

Quoted text here. Click to load it

It is difficult to say if SystemC is the best language for hw/sw modelling
since there are a number of other good languages competing in that space for
which I personally have no knowledge. However, what I do know is that
SystemC is quite a powerful language (more accurately a C++ class library
and event based simulator). You can use all the power of C++ and at the same
time use the SystemC class library to model concurrency (e.g. you can model
with and without delta cycles). However, were the language is not so good (I
was told) is in supporting gate-level models but then again it wasn't
developed for that purpose.

You might also want to look at SystemVerilog which overlaps with SystemC to
a certain degree. In general one can say that SystemVerilog allows you to go
lower, that is, towards gate-level whereas SystemC allows you to go higher
towards Operating Systems.

You will get a much better answer if you post this question to the SystemC
newsgroup at :-)


Quoted text here. Click to load it

Re: SystemC in modeling HW/SW
Quoted text here. Click to load it

Well, I'm not sure I can compare it to other alternatives but I can
give you an idea of how I use SystemC in a hw/sw design.

I created a SystemC model of the PowerPC used in the Ultracontroller-
II configuration (only 32 inputs, 32 outputs). It is very fast because
very simple (not cycle accurate because it simulates at the source
code level, never at the assembly level).

With my simulator (Active-HDL), I can then do a cosimulation of the hw
(vhdl) and sw (program in C, PPC model in SystemC). My PPC program is
in C but I compile everything in SystemC (since SystemC is C++, and C
can be made compatible with C++).

In my case, the alternative for co-simulation would have been to use
the swift model of the PPC, which I need an additional license for
from my simulation vendor, and is quite slow anyway apparently.

Now, what would be nice would be a SystemC model of the full PowerPC,
instead of the swift model.


Site Timeline