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Synthesis of more FSMs in one file using DC

Hi everybody,

is there some methodology supporting for synthesis of more FSMs included in one source file ?

How to set constraints of each one FSM separately ?

Something like:

dc_shell:> set_fsm machine1 dc_shell:> set_encoding_style one_hot

dc_shell:> set_fsm machine2 dc_shell:> set_encoding_style gray

dc_shell:> compile

dc_shell:> set_fsm machine1 dc_shell:> report_fsm

dc_shell:> set_fsm machine2 dc_shell:> report_fsm

Or is it really needed to write FSMs into separate files ?

I was unable to find any synopsys/synthesis newsgroup :o(

Thanks Marek

--
Dipl.-Ing. Marek Ponca
Institut of Circuit Technology and Electronics
Faculty of Electrical Engineering and Information Technology

Ilmenau Technical University
P.O. BOX 10 05 65
98684 Ilmenau
Germany
Reply to
Marek Ponca
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HI,

Only one FSM design per entity is recommended. If a file has multiple FSMs for a single entity , only one is extracted each time you compile. It is not possible to predict which FSM will be extracted. Regards, Mohammed A khader.

Reply to
Mohammed khader

"Marek Ponca" schrieb im Newsbeitrag news: snipped-for-privacy@office.com...

Synthesis constraints for XST

VHDL Before using FSM_ENCODING, declare it with the following syntax: attribute fsm_encoding: string; After FSM_ENCODING has been declared, specify the VHDL constraint as follows: attribute fsm_encoding of {entity_name|signal_name}: {entity|signal} is "{auto|one-hot| compact|gray|sequential|johnson|user}"; The default is AUTO.

Regards Falk

Reply to
Falk Brunner

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