Hi, In my TOP level verilog module, I have a data going from the ROM in one of the blocks to the input of the Multiplier block. After synthesis, I am getting the following warning message: " Removing sequential instance of . in view.UNILIB.FPCPE(PRIM) bcoz there are no reference to its outputs ". Can anyone help me with some explanation for this warning message?
Thanks & regards, Srini.