In my Virtex2 design, I have an external clock coming into an IBUFG, with the output connected to CLKIN of a DCM. Two of the DCM outputs (CLK1X and CLKFX) are connected to BUFGs. So what should I declare on the "Clocks" tab of SCOPE in Synplify Pro? The input port, the net at the IBUFG output, the two BUFG instances, or what? I am having trouble getting Syn Pro 8.0 to understand my clocks.
- posted
19 years ago