Synplify compile points keep getting resynthesized

Hi all,

For some reason synplify is resynthesizing my compile points even though the compile points' rtl have not changed and compile points' sdc files are the same as the initial compile. Synplify is saying "mapper or mapping options have changed" for all compile points in the design. I have not changed the mapping/synthesis options in the project file. Because I was doing some copying (I am working on a copy of the initial compile database and simply updating the rtl file list), the time stamp of the sdc files and compile point implementation folders have changed. Would this cause a resynthesis?

Thanks, NuLL

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