Hey all, I have a synchronus reset signal that has a very large fanout. Is it advisable to put this signal on a bufg?
Thanks
Matt
Hey all, I have a synchronus reset signal that has a very large fanout. Is it advisable to put this signal on a bufg?
Thanks
Matt
Howdy Matt,
Unfortunately, the global clock buffers are only usable for clocks on Xilinx devices. Since it is synchronous, you might try letting the tools chew on it (if you haven't already) with local routing and see what timing results. If that is too painful, consider switching to the GSR (there are safe and easy ways to use it).
Good luck,
Marc
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