switching problem

Hello!

I'm trying to build the following thing: a 7-segment-led that increases its value every time a switch is pressed.

library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity sevsegment is Port ( clk_i: in std_logic; sevseg : out std_logic_vector(6 downto 0); reset : in std_logic; switch: in std_logic); end sevsegment;

architecture Behavioral of sevsegment is signal sevseg_s: std_logic_vector(6 downto 0); begin

process(reset,switch,clk_i) variable counter: integer range 0 to 9; begin if clk_i'event and clk_i='1' then if reset='0' then counter:=0; sevseg_s

Reply to
Simone Winkler
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Hello,

When you say, "Why doesn't it work?" it would be helpful to know what the failure mechanism is...

I wonder if this is a lab assignment gone wrong, or an astute application of reverse psychology to get an answer to a homework question? ;)

For what it's worth, I think you might go back and review how to describe a synchronous counter. Your code may simulate properly, but a synthesis tool may have a difficult time implementing it.

You could design a synchronous counter with no clock enable, where the switch signal is used as the clock, assuming you debounce it properly.

Or, you could design a synchronous counter that is clocked from a free-running clock, and you use the switch signal as a clock enable, assuming you debounce and synchronize it properly, and then detect transitions on the signal across clock cycles to generate a single "press" event that will allow the counter to increment only one time in response.

Eric

Sim>

Reply to
Eric Crabill

Hi Simone - As Eric suggested, there is code which simulates, but might not be synthesizeable. One problem area might be the use of multiple clocks. Switch does not need to be a clock in this case. The starting point would be to build a simple edge detect circuit for a normally HI signal, with low going pulse for an event capture.

q0_switch

its

Reply to
John Retta

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