Hey check out
Steve
Hey check out
Steve
Steve,
I'm sure Jeff and his cohorts appreciate the plug... The website says far more than they were will> Hey check out
--
--Ray Andraka, P.E. President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950 email snipped-for-privacy@andraka.com"They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759
Looks interesting.. Does the EEMBC benchmark mean they have real silicon ? On all other cores, I see (ASM OPT) gives quite a gain over (C OPT).
Thus on this core, could one expect (ASM + Floorplan OPT) to also give gains ?
-jg
There is more info here :
Talks of dual port memory, 100MHz logic fabric speeds, and this comment was the most revealing : "When the compiler extracts and creates a custom pipeline, it also works out the latency, so it knows how large a delay slot to insert in the code stream for that operation." So the PR talk of a 'single opcode' was only part of the story - These HW assisted single opcodes can be quite slow (relative to other single opcodes, but of course, still much faster than SW wheel spinning ) DMA reload in two halves in 80-100us also sounded good...
No sign yet of numbers showing just how big the ProgLogicFabric is ?
-jg
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