I have a design needing a RAM which Quartus is putting into 2 VERY under-utilized Mega-RAMs instead of the M4Ks I want it to be built with. When I try to force it in the M4Ks I get the message:
Error: Can't use port A width with port B width in altsyncram megafunction
I initially instantiated altsyncram manually but when I got the error I used the memory compiler to generate it (which also let me force it in the M4Ks) and still got the same thing.
The RAM parameters are:
- Bidirection dual port mode
- Port A: Read/Write, 32-bits wide, 256 entries, 4-bits of byte enable
- Port B: Write only, 128-bits wide, 64 entries, no byte enable
- no output registers for either ports
- Each of port A and B has its own separate clock
Does anyone know why this is happening or how I can fix it? I could just string up 8 M4Ks myself but doing this manually may be painful as I expect these parameters to change a lot.
Peter