Hello all,
I had psted this question earlier but havent got any response yet... I was wondering if the questions I asked made any sense (or) were they just out of the way... So again, I have the Micron SDRAM Verilog code and I need to make SRAM read/write the SDRAM... Obviosuly, the SRAM shold maintain its own functionality (i.e. it itself can be read/written).
The questions I have are:
(1) Should my SRAM just issue Read/Write command to SDRAM Controller and then it will do the rest i.e. Read/write from SDRAM.
(2) Should'nt the SRAM output (Q) be a bi-directional since this pin Q has to be used for SRAM read and also for SDRAM read?
The logidc diagram I have come up with is as below:
INTERFACE -Logic ______________________________ |IF Read_SDRAM = 1 then | `````````````````` |- Initiate SDRAM Read Command |------>|SDRAM Controller| |- Addr = SDRAM_Address; | `````````````````` | | | |IF Write_SDRAM = 1 then | | |- We_n = Write_SDRAM; | | |- Addr = SDRAM_Address; | | ------------------------------ v A ******>| | | ____________ B**********>| | Addr(11-bits)--->| | C*************>| other I/Ps | | | | | ... | | V V V ... | | _____ ... | Micron | Data---->| | ------>| SDRAM | Wad ---->| |_________ Q | (168-pin) | Rad ---->|SRAM | | | | ---->|_____| | | | ^ ^ ^ | | | | | | |_______Dq (16-bits)__ | | | | | | | clk____| | | ____________ WE ________| | RE____________|
Steps to the above logic-diagram:
(1) I have allocated 3 new pins to the SRAM above namely A,B,C which are designated as:
A --> Read_SDRAM (1-bit) B --> Write_SDRAM (1-bit) C --> SDRAM_Address (11-bits)
(2) The Interface-Logic shown above programs the SDRAM Controller as to whether the SRAM wants to Read (or) Write the SDRAM. ie. the SDRAM Controller is asked to fire the appropriate Command to the SDRAM (Read, Write, Aotorefresh etc..)
(3) The SDRAM Controller then takes over by firing executing the Command requested by SRAM.
(4) Say, if the SRAM requested a Read from SDRAM, then the data read (16-bits) is sent back to the pin-Q of SRAM.
Note: that the pin-Q is also used for outputting the 16-bit data for Reading the SRAM itself!
So folks , please let me know if the above logic and its description makes sense...
Thanx, Eagerly waiting... Vick