Hi,
I'm in the process of designing a small spartan-3 based board. The board will have the following memory devices on a common bus:
-2x(1Mx16b) SRAM's part #CY62167DV30 configured as one 32b memory
-2Mx16b Flash part #LHF00L15
What I need to determine is how to connect the address busses of these devices, and also in doing so ensure compatibility with the Xilinx EMC core. Currently I'm connecting the address bus on the board as follows:
FPGA SRAM Flash
0 NC NC 1 NC 0 2 0 1 3 1 2 ...With this arrangement will I be able to configure to Xilinx EMC core with a Flash bank and an SRAM bank? Also what size datatypes will be wirteable/readable from each bank?
Thanks in advance, Matt