Spontaneous Board Reset

Hi!

I've been having a really weird problem with a Xilinx Virtex-E XCV1000E development board from AVNET. I've got a VHDL design that I've been working on since october last year. When I upload the compiled design into the FPGA, everything works fine except after a couple of seconds (10s or so), the board resets itself and the FPGA is reprogrammed with the onboard design.

(There is a sample design in an onboard ROM chip. I download my design via the JTAG interface.)

When I take an old design (Tuesdays' in fact), everything runs fine and stable. The only change is that I make two instances of a module instead of one. The module is a self-written serial multiplier with RAM and ROM. The only difference between the two instances is a different ROM configuration (ROM data). The input lines (20-30 lines) are identical and the output lines (three of them) are treated very similar.

I have already consulted my University colleagues, but so far without results. I already checked temperature, the clock/reset nets and I/O pin assignment. Everything looks fine to me, but I'm certainly not an FPGA wizard...

Any ideas? Any recommended course of action?

Thanks for your help!

Cheers,

-- Ulf

Reply to
Ulf Ochsenfahrt
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Get a schematic and see what can drive the reset line. Reset should only occur at power-up or power overload. Good luck.

-- Mike Treseler

Reply to
Mike Treseler

Check the power rails are not dipping. If they do you could get a re-configure and subsequent reset. Also check there are no glitches on the PROG line.

-- John Adair Enterpoint Ltd. - Home of Broaddown2. The Ultimate Spartan3 Development Board.

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Reply to
John Adair

"John Adair" wrote in message news: snipped-for-privacy@echo.uk.clara.net...

I second that.

I once had an embedded system that reset when using the FDD.

Turned out my PSU wasn't quite beefy enough, hence when the motor turned on, Vcc dipped, casing a reset.

Reply to
Kryten

Thanks for your replies, however, the problem is still unsolved:

I looked through the schematics and it shows the board reset button with a pull-up resistor (I read that as low-active reset). This net is connected to an IC (the onboard ROM I guess) and to a certain pin on the FPGA.

My thought then was that maybe the FPGA pulls down that pin for whatever reason. So I specified a pull-up in the constraints file. This helps. But not much. The board still resets itself, just after a slightly longer amount of time.

Then, a colleague also said that it's most likely a problem with the power supply. So I got a fancy electronic power supply, where you can set the voltage to a certain level and it shows the current.

The current tops at 1300 mA, which is more than the previous power supply could handle (it says 1200 mA max). The improved power supply helps. But, the board _still_ resets itself.

Now here's something interesting: My old (working) design only draws 1000 mA.

I am still investigating this.

Thanks for your help.

Cheers,

-- Ulf

Reply to
Ulf Ochsenfahrt

supply. So I got a fancy electronic power supply, where you can set the voltage to a certain level and it shows the current.

could handle (it says 1200 mA max). The improved power supply helps. But, the board _still_ resets itself.

What about the powersupply on the board ? I'd guess you have an external power supply providing a single voltage and then on board several regulators to generate the voltages required by the FPGA ? Can theses handle the bigger current ? Maybe one of them is just heating, triggering thermal protection or ...

Sylvain

Reply to
Sylvain Munaut

What about the powersupply on the board ? I'd guess you have an external power supply providing a single voltage and then on board several regulators to generate the voltages required by the FPGA ? Can theses handle the bigger current ? Maybe one of them is just heating, triggering thermal protection or ...

Good point. The voltage regulators do get hot when I load my design. Fortunately, we got an office fan here, which we now installed above the board (looks pretty funny, if I had a camera, I'd take a picture). And now the board has been running fine for the last 5 minutes (wouldn't run longer than 30s before).

Seems odd though. The sample design (delivered with the board) is said to use ~600 mA and that is pretty small. Not to say tiny. Shouldn't the board have power regulators that can handle more than that? Or maybe they forgot to attach the heat sinks?

Thanks for pointing that out.

Cheers,

-- Ulf

Reply to
Ulf Ochsenfahrt

Just for the fun of it. Here's my solution:

The picture won't be there forever, if you'd like to keep it, you may want to mirror it.

Cheers,

-- Ulf

Reply to
Ulf Ochsenfahrt

mirror it.

Do you run the fan in oscillating mode, or stationary?

Here are some things to think about:

The regulators on the board may be current limiting at 1000mA

The regulators may be going into thermal shut down, (add a heat sink and maybe a smaller (muffin) fan?)

You are measuring current by looking at the front panel of your power supply (or maybe a multimeter in the power line to your board). This current measurement is an average measurement. If for instance it shows 1200 mA, and your system causes a 10uS transient of 2000 mA, the meter will probably still show 1200 mA.

You need to look at the VCC rail, close to the FPGA with a fast scope, at least 100 MHz bandwidth. What you are looking for is transient drop in the VCC voltage that the FPGA sees, not what the bench power supply says it is supplying.

This suggest a power supply problem.

I agree.

Both voltage and current reading are average, at the power supply. What you need to know is what the FPGA is seeing. With your design running, the current consumption varies depending on what is happening. Depending on how the voltage regulation and decoupling is done on the board, this variable current consumption will cause variation in the voltage. None of the high speed behaviour will be shown on your bench power supply meters.

You may need to add more decoupling capacitors, as well as heat sinks and fans to the on-board regulators.

The problem is likely the on-board regulator cant handle the current you design needs (although only at transient events).

This supports all previous conclusions.

Philip Freidin

=================== Philip Freidin snipped-for-privacy@fpga-faq.com Host for

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Reply to
Philip Freidin

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