Spartan3A : timing Constraints / DCM Outputs

Hi Folks,

have the following problem and couldn't found out yet how to solve it:

I have a clock input CLK_A and a DCM. I use CLKO and CLKFX outputs of DCM. CLKFX is configured for 4X CLK_A.

I define period constraint on CLK_A input port. And I see this constraint will be translated to both outputs CLK0 and CLKFX respectively. But timing analyzer does not analyze CLKFX output and its fanout logic. It just shows something like: " 0 items analyzed, 0 timing errors". I thought it should be enough to specify input clock frequency with TNM_NET and so on like:

NET "CLK_A" TNM_NET = "CLK_A"; TIMESPEC "TS_CLK_A" = PERIOD "TN_CLK_A" xx ns;

Any hint is appreciated.

Thanx Metin