Spartan3 "commercial" temperature range

I can answer this, because I was the one who "did it". This is not a Spartan issue, it was established about 15 years ago, and applies to all Xilinx FPGAs, and it would not surprise me if Altera now uses the same reasoning.

In the distant past, commercial was defined as 0 to 70 degrees C ambient. We soon realized that "ambient" is a meaningless number for a progarmmable part, where the self-heating power consumption can vary by several orders of magnitude. The decisive limitation is junction temperature, no chip really cares about ambient temperature per se.

So we decided, against some customer complaints, to define "commercial" byits junction temperature, and we raised the top by 15 degrees, to allow for power dissipation and thermal resistance. We told our customers that "ambient" was obviously more easy to control and measure, but was meaningless as a chip limitation for programmable logic.

So, that's why we have 85 degrees fro commercial, and 100 degrees for industrial. The military specs had always used 125 degree case as their max limit. Peter Alfke, Xilinx

dalai,

It is no secret that the low temperature range parts really have the same mask set as the extended range parts.

So what makes the I grade cost more?

I grade is tested, so that the specifications are guaranteed.

If you take a C grade part, and test it yourself at -40, and +100 (junction, not ambient), and it works for you, then you take the responsibility, and you are paying for its testing.

Simple as that.

Pay Xilinx, or pay the price yourself: TANSTAAFL

But, if a part doesn't work, you will not be able to get Xilinx to help you, as we didn't do the test, hence, we do not guarantee the junction temp to be anything other than what the part is marked as (C).

It is also no secret that since the days of "hollow state" devices (tubes like the 12AX7 family...),

If a component tests and meets a higher performance target, it gets marked as such, and you pay more for it. That means that ordering the slowest, or lowest performing component means you have parts that are a mix, from the best, to the just passing (look at the specs for a 2N2222).

You turn on the tester, put the parts in the hopper, and they fill the bins on the other side: from highest speed grade Industrial, all the way down to lowest speed grade commercial. Remember that your lowest speed grade commercial bin may have the fastest and widest temp parts in it too, as once the orders are filled for the fast parts, you keep on filling the bins below that until the orders are all filled.

Austin

Un bel giorno Peter Alfke digitò:

For some reason I was convinced that Spartan II were still codified with the "traditional" ambient temperature ranges, but you are right: even S2 are codified with Tj.

I've never used Altera parts, but I know for sure that all the Actel parts (CPLD and FPGA, either flash and antifuse) are specified with the traditional temperature ranges, 0/+70 and -40/+85 ambient.

Even Xilinx still does it for the CPLDs: for example XC9500* are available in 0/+70 and -40/+85 ambient temperature.

I was genuinely convinced that -40/+100 °C was the working ambient temperature for a "typical" design, and the +125 °C reported in the maximum ratings was the maximum working Tj. Until now I've always used FPGAs in designs with high logic densities but very low clock frequencies, therefore I've rarely had to extimate the power generated by the FPGA. I'm not surprised that I've never noticed this problem: in my designs Ta and Tj are very close.

Now if I've understood correctly, you are saying that I need to use Tj=+85 or +100 instead of the +125 maximum rating, and therefore the meaning of this maximum rating is something like: "at 125 °C the part won't fry, but won't work either"? :-)

Un bel giorno austin digitò:

Yes, of course; I know how the selection is made, but I was wondering why Xilinx decided to use two nonstandard ranges (0/+85 instead of 0/+70 for commercial, and -40/+100 instead of -40/+85 for industrial) and I made the hypothesis that too many parts tested successfully for -40/+85 range, therefore they were "demoted by marketing" to 0/+85.

Instead, the correct answer was Peter's: these aren't ambient temperatures, therefore they (unfortunately) don't have a direct relation with the temperature ranges of the common silicon parts.

dalai,

The Ambient temperature, combined with the user's deisgn, and their heatsinking and airflow, will determine the junction temperature.

Or, another way to look at it, don't exceed the junction abs max. Lower the frequency, add more heatsink, increase the airflow, or lower the ambient.

The CPLD has historically had low enough power, and sufficient design margins, that the worst design (for power) was still OK. Not so with the FPGA.

The 125C abs max, like all abs max specs for Xilinx means that above this temperature (voltage or current), the failure rate might be 0.1% or more. At or below this temperature (voltage or current), the reliability and lifetimes of the parts are as specified in the quarterly reliability report.

We have had people who have used our parts far above 125 C, and they understand that the parts may not live as long as they would at room temperature. But then, instrumenting an oil rig's drill bit is a tough application where 20 year life is not a requirement!

Austin