Spartan ii Slave Serial programming

Hi there,

I am having trouble with Xilinx Webpack 7.1i, trying to program a chain of 2 Spartan II FPGA's in slave serial mode.

I am not using any Slave Serial pod, but rather feeding the FPGA's chain with a bit stream pumped from a parallel PROM file, created in .EXO (EXormacs) format. I guess lots of people do that.

The PROM is itself created by ISE, following the links "Generate Programming File", "Generate Prom, ACE or JTAG".

At the end of the programming, the FPGA's chain has its DONE pin pulled down (programming not successful). Fortunately, I am lucky enough to have kept on another old PC a copy of a program named PROMFMTR, dating of the old times of the Foundation tool, that was dedicated to prom making only I believe.

So, I fed that good old program with my two .bit files and TO MY SURPRISE, everything was the same up to the last two lines in the .EXO file. The PROMFMTR program creates one more line than the ISE tool. That line is essentially all 0's in the data field (4 additional bytes).

Googling a bit seems to indicate that Spartan II FPGAs (also others ?) require a few more clocks to get out of their internal state machine and start to work. That is probably why the additional 4 bytes (forgotten in Ise ?).

If that is true, how comes that no one has ever seen that at Xilinx ? It is such a big flaw if true.

NOTE: I am using the same ISE program with Spartan3 FPGAS, but the additional bytes are there, and they load perfect with the same end to end tools.

Any idea ? Thanks for your help.

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abeaujean
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