Spartan 6 Digital controlled oscillator

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Hello,

        What is the best way to implement a 30 MHz clock generation circuit
 that can be dynamically controlled to provide fine frequency offsets in a  
Spartan 6, the clock is to be used internally and output via a pin? Would a
 DCM provide the functionality and what would the minimum frequency increme
nt be?  

Thanks
John

Re: Spartan 6 Digital controlled oscillator
On Wednesday, 5/17/2017 4:42 PM, john tra wrote:
Quoted text here. Click to load it

Spartan 6 DCMs are not good for this.  I don't remember if they have a  
dynamic reconfiguration port, but even so there is no fractional divide  
capability, so you're stuck with simple (small) integer ratios of the  
input clock frequency.  Not only that, reconfiguration (even dynamic)  
requires stopping the clock for some period and allowing re-lock.

In 7-series parts, including Artix-7, the MMCM provides a fine phase  
shift that wraps back to zero rather than capping out at some max angle.  
  It can be used to vary the output frequency over a small range without  
reprogramming the multiplier/divider of the frequency generator.

Here's a thread on the Xilinx forums going over the details of this  
approach:

https://forums.xilinx.com/t5/7-Series-FPGAs/MMCM-with-smoothly-varying-output-frequency/td-p/678630


--  
Gabor

Re: Spartan 6 Digital controlled oscillator
On Wednesday, 5/17/2017 4:52 PM, Gabor wrote:
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Looking back at that same thread, I see there was a similar solution for
Virtex 2 PRO using 2 DCMs.  Perhaps this approach could be used in
Spartan 6.  Also if you really wanted a broader range of frequency
control, the dual DCM approach could be used to keep the clock running
while one of the DCMs was reprogrammed using the DRP (if it exists in
Spartan 6).

--  
Gabor

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