Im trying to make a LPC bus interface to record the bus traffic as a result of keypresses.
Im using the clk from the LPC bus as my process clock. But it seems that the LFRAME# signal is always high and never drop low.
Im using the Expansion Connectors I/Os, accessory headers, on the spartan 3e fpga to do the probing.
I'm not sure if the I/O pins Im using is appropriate. I'm using the J4 and J1 6-pin accessory header on the board to probe... with LVTTL as my I/O standard.
Is it fast enough? cause the result of my output does not look like it is appearing fast enough
Anyone has any idea what else I can do?