The SP-3E datasheet only talks about external programming hardware regarding the SPI configuration Flash. Is there a bootstrap programming method planned for these Flash memories (eg. using the JTAG interface with the usual ISE configuration tools)?
Regards.
-- PabloBleyerKocik /"I've finally learned what `upward compatible' pbleyer / means. It means we get to keep all our old @embedded.cl / mistakes." -- Dennie van Tassel
"Pablo Bleyer Kocik" schrieb im Newsbeitrag news: snipped-for-privacy@l41g2000cwc.googlegroups.com...
you mean similar feature to Altera JIC? Isn't it too early for those questions? :)
Antti
We recommend the direct programming approach for SPI Flash PROMs as it is the simplest and fastest. As you pointed out though, it is not the only method. There is a forthcoming application note that provides additional SPI programming options.
The direct programming approach is also useful with some third-party SPI Flash programmers that support in-system programming using a socket adapter (example: Needam's Electronics).
We already have a similar, documented approach for programming attached parallel NOR Flash via JTAG as part of the MicroBlaze EDK software. See the following link.
One advantage of Spartan-3E FPGAs is that _all_ of the configurations pins can be reclaimed as full-featured user-I/O after configuration. This means that you can easily access external SPI or parallel NOR Flash. This means that you can program the attached memory from the FPGA. This also means that your FPGA application can have readable/writeable, random-accessible, byte-addressable, non-volatile storage without adding yet another PROM to the board. A single SPI or parallel NOR Flash can configure the FPGA, contain all the code for an embedded MicroBlaze processor, and store any design information such as serial numbers, Ethernet MAC IDs, etc.
Stay tuned for details.
--------------------------------- Steven K. Knapp Applications Manager, Xilinx Inc. General Products Division Spartan-3/-3E FPGAs
--------------------------------- The Spartan(tm)-3 Generation: The World's Lowest-Cost FPGAs.
"Steven K. Knapp" schrieb im Newsbeitrag news:d0538e$ snipped-for-privacy@cliff.xsj.xilinx.com...
adapter
the
means
always :)
1) the parallel flash programming from EDK doesnt work for most customers for one or anther reasons. 2) the seperata SPI programming, I am an happy owner of the Memec V4LX board that contains the xilinx SPI ip core and where the SPI is programmed using XAPP 800 provided tools, the result is that that all stuff just doesnt work I can program the SPI from using some weird bat files, thats ok but config is not ok.so the original question was a good question, a completly integratated approuch that works and programs the attached (config) memories would be a good thing.
any more app notes aga xapp800 would not be sufficient. if the working programming solution is not integrated in the toolchain its a pain
Antti
it is
only
additional
The real problem is PCB estate and device programming. It is going to be much cheaper to use a single interface for product configuration and testing.
SPI
adapter
The idea is to exactly avoid that. ;)
attached
See the
I am aware of that solution. However I was looking for something more simple and integrated with Xilinx configuration solutions (as Antti already pointed out).
pins
means
means
Yes, this is really nice and what triggered my inquiry. I was expecting that Xilinx tools were going to exploit that feature out of the box.
I will :D
Thanks again. Regards.
-- /"The three most dangerous things in the world are PabloBleyerKocik / a programmer with a soldering iron, a hardware pbleyer / type with a program patch and a user with an idea." @embedded.cl / -- Rick Cook, The Wizardry Compiled
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