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Spartan-3 stater kit

Dear all,

I'm really not a specialist in FPGA :-)

For several years now I have a microbalze SoC running on a Digilent Spartan

-3 Starter Kit Board with a XC3S200 FPGA. The board acts as the digital con troller of a NMR spectrometer. Since I need more uC memory to update my cod e (only have 16 K in this implementation) I purchase from Diligent another S3SKB with a XC3S1000FT256-4 FPGA that was been sitting at my desk for four years now.

I finally decided to migrate the design from my old board to the new one. T o make sure I knew what to do, I started with one of those MB tutorials fou nd on the web, compile it and download the bit file to the old board using impact. The application run as expected. I then went back to XPS and change d the device size on system->project option, recompiled the design, and aft er downloading, nothing happens. Actually, all leds on the board lit up and stay that way.

So, I guess my questions are:

1 - The new board came with a design loaded on the platform PROM. Do I need to change anything to force MB to load from BRAM? 2 - Besides changing the device size on XPS, do I need to change anything e lse on my project.

Any other ideas?

I'm using XPS 7.1 (it works for me !)

Regards jmariano

Reply to
jmariano
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Is the XC3S1000 really the exact same board with just a larger FPGA chip mounted? If not you'd need to make sure that the UCF file matches the new board connections.

--
Gabor
Reply to
GaborSzakacs

Hi Gabor, thanks for the help. Digilent's documentation is spase but the board revision is the same and the manual is the same for both FPGA, so I assume ucf to be the same.

Reply to
jmariano

Depending on how the clock generation is handled on the board, you may have to configure an external PLL to get the desired clock frequency to the FPGA. The PLL got configured with the vendors GUI. The old Opal Kelly Spartan 3 boards that I am familiar with required this. There may also be some jumpers to set for stuff like auto-configure.

Good Luck, Bob

Reply to
BobH

I've seen this before, as a first step try removing the M0 jumper.

See this post/thread for more info and other debugging suggestions:

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-Brian

Reply to
Brian Davis

Hi,

Thanks for the help.

BobH, the S3SKB has a on board 50 MHz clock connected to the FPGA. You can replace it by other clock generator but that's it. Of course you can use DCM inside the FPGA to juggle with your clock, but not from the outside.

Brian, I'll try that when I'm back to work next Monday.

jmariano

Reply to
jmariano

(snip)

(snip)

You can also chain DCMs, though it is better not to to that. If you do, you should use the LOCK signal of one to keep the next one from trying to lock. (I believe with an inverter in between.)

With two DCMs you can get from 50MHz to 14.318181818...MHz.

-- glen

Reply to
glen herrmannsfeldt

That's surprising. They were founded by two profs from WSU Pullman and every thing that I have see from them looked like classroom materials. Everything was pulled together and was placed in one document.

John Eaton

BTW: Never assume anything.

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Reply to
jt_eaton

Hi All,

Thanks for helping!

After a bit of experimentation I found problem! In EDK 7.1 (I don't know on newer versions) when you change the device in Project Options, all the files are changed except platgen.opt. This one was to be changed by hand. When I did this, the project compiled OK.

John Eaton - Sorry, but my English is not enough to know if you're being sarcastic or not...

Reply to
jmariano

Don't feel bad, I am a native English speaker and I think that I used to work with John (Vancouver, WA) and I don't know if he was being sarcastic or not!

BobH

Reply to
BobH

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