Hello All,
I have been having some trouble with a custom designed FPGA board based on the Xilinx Spartan 3 (XC3S400-FT256). I am hoping that someone here might be able to shed some light on the problem. Essentially, pins on certain IO Banks don't work as outputs unless at least one pin on the affected bank is designated as an input and is continuously receiving an active high (3.3V) signal.
First let me go into a bit more detail about the board and the FPGA configuration. All 8 IO Banks on the FPGA are configured to receive VCCO=3.3V. Every IO pin used is designated for LVTTL signaling. 40 of the FPGA pins, mostly from IO Banks 0 and 5, attach to a General Purpose IO header on the board. While attempting to program these pins for various output functionality, we noticed that they did not work (the output will always be logic '0') unless at least one pin on the same IO bank was specified as an input and was receiving a 3.3V (logic '1') signal. The problem appears to be isolated to banks 0 and
5, though it is possible that other banks may be affected.When I look at the output of the non-working pins on an O-scope, I see that when the signal should be driving high to 3.3V, its only jumping
200mV or so. It's as if the signal is somehow being pulled down to ground, though I have no idea how or why. The 3.3V VCCO supply appears to be fine, and is connected to all of the pins on the FPGA that it should be. Other components on the board are also powered by the 3.3V supply, and they are working fine.I'm pretty stumped as to what might be causing this problem. Has anyone out there ever experienced this problem? As far as I can tell, it certainly isn't a "feature" of Spartan 3 FPGAs. Any help would be greatly appreciated.
Thanks,
-Ben