Simulating EDK 8.1i System using ModelSim 6.1e

Hello,

Recently, I have been trying to simulate my system to verify that the pieces are working correctly in my EDK project. In order to do this, I need to use the SmartModel simulation tools for ModelSim 6.1e. I've read through all of Xilinx's documentation and have set up the modelsim.ini file correctly, but when I run the simulation, everything hangs. There are no calls to the BRAM to fetch code for execution.

The only thing I get that might be a part of the problem is the following warnings:

# ** Warning (SmartModel): # Model is being requested to run at a finer resolution than necessary.

Anyone been able to do a system level simulation using SimGen and EDK?

Jon

Reply to
kits59
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It should go without saying, but the EDK version is 8.1i with the latest 8.1 WebPack

Reply to
kits59

I have no experience with EDK but that warning is OK, if I run my design with anything smaller than ps I get this warning. Given that your system hangs I suspect you are loading the wrong dll/sl/so or your libraries are out of sync with the model, check that your veriuser, libsm and libswift variables are all setup correctly,

Hans

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Reply to
Hans

This is not a problem. 1ns resolution is too coarse for SmartModel simulation (and will not work) - 1ps is "too fine" but does work. I haven't tried 100ps or 10ps but suspect one of these is the correc answer.

Something else must be the problem : check clocks, resets, is your bRAM mapped to cover the boot address (FFFFFFFC for the PPC405), there are no "Warning: unbound component" messages when ModelSim loads the design etc?

- Brian

Reply to
Brian Drummond

The funny thing that I should probably state is that the entire system was simulating perfectly fine under EDK 7.2. The bRAM is mapped correctly so that the starting values are where they expect them to be. I haven't tried working with 10ps or 100ps, so I'll try those and report in a little while.

Reply to
kits59

Ah.

I haven't tried porting a design to 8.x from 7.x yet, but had bad experiences running 6.x projects under 7.1.

Did you use the "import earlier version" tool when moving to 8.1? Did it ask you if you wanted to upgrade any cores, or report that it had to, because some of the earlier cores were no longer supported? Sometimes the updated cores are incompatible with the earlier ones, and the innocuous "update" breaks the design in hard-to-find ways.

I confess I never DID get to the bottom of one such "upgrade" on a demonstration app, I didn't find out exactly how the upgrade had broken it - it was easier to simply ask the vendor to supply a 7.1 version!

If I HAD to fix it, I'd try using the original cores, or (if not possible) I'd check the logs of the first build in 8.1, and check all port connections, and see if the register definitions (and address maps) had changed between versions...

I wonder if Xilinx have fixed the "import from earlier versions" problems with EDK 8.1? Anyone have experience of this transition?

- Brian

Reply to
Brian Drummond

It did attempt to update some cores. I'm investigating the changes now. I'm also trying to get my hands on the 7.2 installation disks I was using so that I can attempt the problem there. But that doesn't mean that I'm giving up on getting 8.1 to simulate correctly.

Jon

Reply to
kits59

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