In the following module, module mult (output reg[7:0] z, input [3:0] a); always @* begin z = a*a; end endmodule
ModelSim returns 225 when a is 15, but the Xilinx implementation on a Spartan3 returns a 1 (-1 * -1). Does anybody know why Xilinx ISE is interpreting the four bit numbers as signed numbers rather than unsigned?
-Gary
Xilinx ISE 8.1.03 returns 225 in pre and post simulation (ISE simulator). Are you running this on hardware or simulation?
Alan Nishioka
I did not simulate in Xilinx - it was implemented on a Digilent Spartan 3 board.
-Gary
What results do you get for all the other numbers? (8 * 8, for example)
Alan Nishioka
Search for the thread 'multiplier madness' from a couple of weeks ago.
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