Hi
I am trying to implement a shared memory interface between PPC and FPGA fabric. I am using EDK to create a dual port RAM and connect it to a DSOCM controller. I have been able to write to BlockRAM from my application code. My question is that how do I connect the other port of the BRAM to my FPGA design? Should the HDL module be added as a core from the " import peripheral" utility? If so, then which bus should it connect to?
Thanks Amit