This page:
shows some templates for ROM inference in Spartan3 using Xilinx's ISE software.
One of the templates is: library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity rominfr is port ( clk : in std_logic; en : in std_logic; addr : in std_logic_vector(4 downto 0); data : out std_logic_vector(3 downto 0) ); end rominfr; architecture syn of rominfr is type rom_type is array (31 downto 0) of std_logic_vector (3 downto 0); constant ROM : rom_type := ("0001","0010","0011","0100","0101","0110","0111","1000","1001","1010" ,"1011","1100","1101","1110","1111","0001","0010","0011","0100","0101" ,"0110","0111","1000","1001","1010","1011","1100","1101","1110","1111" ); begin process (clk) begin if (clk'event and clk = '1') then if (en = '1') then data