Hi,
I´m asking me if the REFCLK has a closer relationship to the recovered clock than mentioned in the user guide.
Could this be possible: Using a fixed osc. with a frequ. of 100MHz as REFCLK. Receiving data with a variable datarate?
TXCLK= 50..100MHz (TX) ----- fiber ------> RXRECCLK = (50..100MHz), REFCLK=100MHz
Does the recovered clock has phase jumps, nice duty cycle etc - in other words: is it possible to use that clock as an input clock for an external clock synthesizer?
kind regards, thomas