Rocket IO as a high speed sampler

"Benjamin Todd" schrieb im Newsbeitrag news:eaampt$pvr$ snipped-for-privacy@sunnews.cern.ch...

Hi Ben,

I think its almost 2 years now from when I posted some screenshots about the use or MGTs as 3GB/s sampler. The demo displayed the USB HS test pattern captured with MGT

its nothing new.

Antti

Ben,

The problem with using the MGT receiver as a sampler, is that it wants to "recover" the embedded clock signal in the data.

If you can gain access to the input sliced data, after it has been clocked into the serial to parallel converter, the only question is: "what was the clock to the serial to parallel shift register?"

Look at page 34 of

The receiver depends on recovery of an input clock to then shift/transfer/unscramble/decode the received data.

The paths are all there to bypass the 8B10B, etc. but how to you solve the chicken and egg problem of no clock -- no data?

Page 68 discusses the receiver clock options, and if the receiver can't or won't lock to the sampled data based on the clock reference, then I think the serial recovered clock is just a multiple of the refclk as you describe. But the receiver "knows" it has no lock, and how does this affect the rest of the operation?

Austin

Benjam> Hi everyone, (especially those Xilinx chaps) :-)

Antti,

Does not locking to the data affect its operation? What if it tries to lock to the data? What if it can't lock to the data?

Aust> "Benjamin Todd"

If you can live with "just" 2GSPS, that can be done in a virtex2 or above with a little known, regular IOB function called the ibufds_diff_out. With it, a single differential pair input can feed two DDR input registers (one of them gets an inverted signal). If you use two 500 MHz clocks in quadrature (generated by the DCM), you get up to

2 GSPS sampling. If you're in a v4 or above, the iserdes blocks can demultiplex that down to a reasonable rate before it even hits the fabric.

In a v5, you could get up to 2.2 GSPS.

That way you can use FPGAs that don't have rocket-io (and are thus cheaper).

Andy

Antti Lukats wrote:

"Austin Lesea" schrieb im Newsbeitrag news:eaaru5$ snipped-for-privacy@xco-news.xilinx.com...

Hi Austin,

the MGTs can actually be used as simple 20 bit serial to parallel shift register :)

I did no tricks, and I did not see any misbehavior related to CDR locking attempts

so the all thing was mgt in bypass mode connected to 20 chipscope ILA controlled by custom application that collected the data and dsiplayed it in correctly

the rocketio input was just parallel attach to USB HS link as passive monitor

the MGT sampling clock was not any direct multiply of the USB data rate

as of my results I can say that an USB HS receive only PHY can be made with rokectio that would make a real nice usb analyzer with 3GS/s time granularity. sure the phy would be somewhat tricky to make, but possible.

Antti

"Austin Lesea" schrieb im Newsbeitrag news:eaar1q$ snipped-for-privacy@xco-news.xilinx.com...

hm,

look here..

page 9 :)

rocketIO useage as high speed sampler (USB HS 480MBit/s data rate input)

Antti

Antti,

I am impressed it was that simple. I would have thought that the CDR trying to lock would add too much jitter, but then, who cares? You are just sampling, and sampling is always +/- one bit anyway.

Aust> "Austin Lesea" schrieb im Newsbeitrag

Do you want a 2GS/s sampler of 2GB/s data or do you just want high resolution of a lower speed signal? I'm getting a minimum of 9 GS/s in a Spartan3E for a 600 MB/s signal (the sample rate isn't set as much as detected). Depending on requirements, there are alternatives to RocketIO. See also XAPP671

Ah, these are excellent points - Thanks everyone =)

The original purpose was to measure the length of a pulse to some hundreds of picoseconds. 2GS was chosen as a starting point, but ultimately faster is better... So, perhaps naively I was hoping that the actual phase of sample versus source clock was unimportant, but now that you mention it I have to have a rethink....

Interesting.

Cheers guys. Ben

Dear Benjamin

I think you should look at the following article:

A PCI time digitizer for the new JET time-of-flight neutron spectrometer

Sousa J, Batista AJN, Combo A, Pereira R, Cruz N, Carvalho P, Varandas CAF, Conroy S, Ericsson G, Kallne J

FUSION ENGINEERING AND DESIGN 71 (1-4): 101-106 JUN 2004

You should find it interesting taking into account what you are trying to do.

Regards

A. Combo

Austin Lesea schrieb:

See page 153. The option RXDIGRX forces the deserializer to the local reference clock. Years ago I mentioned the lack of this option in Virtex2-Pro to Peter Alfke and he promised to forward the request to the people in charge. Apparently he was successfull ;-)

Kolja Sulimma