Hello, I am working on a new project with a Xilinx FPGA (Virtex 2 or Virtex
4...TBD) on a PCI card (actually, a PCI Mezzanine Card (PMC), which is the PCI interface in a slightly different form factor). Anyway, in architecting this project, we are discussing how to re-configure the FPGA from the host machine (in this case, a Processor PMC card running Linux that will be doing the PCI bus enumeration). Solutions we have discussed would be to have the ability to write to a PROM through custom logic through the PCI bus, and then allow the FPGA to boot from this PROM. We have also big-banged the serial-loading protocol in the past from an ARM processor directly connected to the FPGA, but not over PCI.However, with our forray into PCI, being able to load the FPGA through the PCI bus is quite attractive. Obviously, if the FPGA is providing the PCI bus interface, we would have the chicken-before-the-egg syndrome (i.e., no PCI interface to load the FPGA since the PCI interface is IN the FPGA). So what about using dedicated PCI bus interface chips? These seem to provide a PCI interface on one end, and a memory-interface on the other, making them pretty simple to use. But I still don't see how this will bring the ability to re-program the FPGA image.
I don't need to do it on the fly while the system is up and running; I would simply like to be able to, at power up, have the Processor PMC card open a bitstream file it has on its local file system, dump the bitstream down to the FPGA over the PCI interface, and then have the FPGA start in its normal user mode.
I've looked around a bunch and people are certainly doing this. But I can't find many good explanations as to how its working. Are they bit-bangging JTAG???
Any help is appreciated...
TIA, John O.