I have a 6 month project to work with by hand-recoding openCV C++ project into pure RTL for FPGA usage.
I have a Xilinx Zynq FPGA and I have Vivado.
The code I am using are at
Anyone can advise on how to start working on this ? I have been told to scrutinise the code for any maths operations (especially floating) which I am doing now and I need to use the AXI interface and logicore IP for this, right ?
Thanks !