"readmemh" or "readmemb" in Verilog for initializing memories should only work in simulations and not for ASICs, but I've seen posts saying that XST can recognize readmemh and readmemb for FPGAs, just wondering whether it is true that readmem[b|h] is synthesisable for FPGAs or not?
Have a look in the XST User's Guide. It is not synthesisable, but supported to init the memory. Only constrain is that the file needs to have exactly the amount of entries as the memory has.
Cheers,
Guenter
XST and Synplify both support $readmem for initializing RAMs/ROMs.
-Kevin
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