I am using Virtex2pro - xc2vp30 to implement my HDL-based design. The output of my design will be stored in BlockRAM. How can I read my output from BlockRAM (BRAM)? Do I need to access BRAM using PowerPC? If so, how can I connect this BRAM with the PowerPC bus? I am a beginner of FPGA implementation. So, your advice will greatly help me.
- posted
19 years ago