Re: TIG Constraint

Do you have a question? Post it now! No Registration Necessary

Translate This Thread From English to

Threaded View
Quoted text here. Click to load it
the

Using:

// synthesis attribute TIG of <net_name> is "TRUE";

makes the error go away.  Is there a way to verify that the net is being
ignored for timing purposes?  The log says:

 Set user-defined property "TIG =  TRUE" for signal <signal_name>.

Being that the constraints guide does not list "TRUE" as a valid value I'd
like verification that the constraint is truly doing something useful.

Thanks,


--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Martin Euredjian

We've slightly trimmed the long signature. Click to see the full one.
Re: TIG Constraint
Hi Martin,

TIG should work, if not, you could always try a MCP (multicycle path
constraint) if you know how many times your data is sampled.

Anil

Quoted text here. Click to load it
HDL
the
or
registers
per
nets
must.
http://groups.google.com/groups?threadm=3dbd0daa%241_1%40lon-news.intensive .
net
Quoted text here. Click to load it



Re: TIG Constraint
Sure, I could use multi-cycle in the UCF (or TIF, for that matter). For
maintainability (and reusability) purposes I wanted to include these and
other constraints with the HDL file.

--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Martin Euredjian

We've slightly trimmed the long signature. Click to see the full one.

Site Timeline